1. Field of the Invention
The present invention relates to a method for forming metal-oxide semiconductor (MOS) transistor, and more particularly, to a method for forming MOS transistor capable of effectively improving a transient enhanced diffusion (TED) effect and a short channel effect.
2. Description of the Prior Art
With progress in the semiconductor industry, performance and economic factors of integrated circuit design and manufacture have caused a scale of devices in integrated circuits to be drastically reduced to miniaturized sizes, increasing density on a chip. However, a short channel effect, which results in a poor threshold voltage roll-off characteristic, always accompanies miniaturization. To avoid this problem, the prior art has provided a method for forming lightly doped drains (LDDs) having an ultra shallow junction as a solution.
In a conventional ultra shallow junction formation, a low energy ion implantation process is performed in a shallow surface of a substrate adjacent to two sides of a gate structure, then a rapid thermal annealing (RTA) process is performed to form a junction profile. However, as device scale is reduced to 90-nm and smaller, the conventional ultra shallow junction formation hits a limitation in depth control, and co-implantation performed in cooperation with pre-amorphization (PAI) and laser annealing seems to be able to satisfy demands down to 65-nm and even 45-nm processes.
During the ion implantation process, considerable interstitial defects are created because the implanting ion causes damage to a silicon lattice. The interstitial defects become diffusion paths for a dopant, such as a relatively highly diffusive boron. The diffusion paths greatly enhance the diffusion of the dopant, causing a so-called transient enhanced diffusion (TED) effect, in a following annealing process. TED effect not only deepens the junction profile, but also makes the distribution of the dopant not sheer in a lateral direction, resulting in a severe short channel effect. The idea behind co-implantation is to co-implant ions, such as carbon, to combine with the interstitial defects. Therefore TED effect is reduced and boron clusters are prevented from forming.
Please refer to FIGS. 1-3, which are schematic drawings of a conventional method for forming LDDs having an ultra shallow junction that adopts a co-implantation process. As shown in FIG. 1, a substrate 100 having a gate dielectric layer 102 and a gate 104 formed thereon is provided. A pre-amorphization (PAI) process 110 is performed with antimony (Sb) or germanium (Ge) to damage a silicon lattice of the substrate 100, forming amorphized regions 112. The damaged silicon lattice in the amorphized regions 100 is used to reduce a TED effect and a channeling effect.
Please refer to FIG. 2. A co-implantation process 120 is performed to implant carbon or fluorine vertically into the substrate 100, then a p-dopant implantation process 130 and a first RTA process 140 are sequentially performed to form PLDDs 150 having an ultra shallow junction. Please refer to FIG. 3. Offset spacers 160 are formed on the sidewalls of the gate 104, then another p-dopant implantation 170 and a second RTA process 180 are performed to form a source/drain 190 in the substrate 100 adjacent to the offset spacers 160.
However, because the co-implant dopant is vertically implanted into the substrate 100, its control over lateral diffusion of the p-dopant is not fully satisfactory. Therefore a method that can effectively reduce the abovementioned TED effect and lateral diffusion, thus preventing the junction profile of the ultra shallow junction of the LDD from being influenced by the diffusion and from changing, is still needed.